A programmable logic circuit, or programmable logic network, is a logic integrated circuit that can be reprogrammed after manufacture. It is made up of many elementary logic cells that can be freely assembled. The English acronyms commonly designate this type of electronic component:
FPGA (field-programmable gate array, programmable network gate in situ)
Although fundamentally synonymous, these terms are not generally interchangeable in the commercial vocabulary of manufacturers: FPGA rather designates components with RAM technology, EPLD components with FLASH technology, and PAL components with fuse technology.
The programmable logic arrays are compounds circuits many elementary logic cells freely assembled. These are connected permanently or reversibly by programming to achieve the desired digital functions. The advantage is that the same chip can be used in many different electronic systems.
Some models also include: the memory of use generally blocks “DSP” cords of locked loops stage for clock generation.
Most modern large FPGAs are based on SRAM cells to be interconnected for both circuit routing and logic blocks.
A logic block comprises a correspondence table (LUT or Look-Up-Table) and a flip-flop (Flip-Flop in English). The LUT is used to implement logic equations, typically having 4-6 inputs and one output. It can, however, be considered as small memory, a multiplexer or a shift register. The register is used to store a state (sequential machine) or synchronize a signal (pipeline).
The logic blocks, present in large numbers on the chip (from a few thousand to a few million in 2007), are connected by a configurable routing matrix. This allows the component to be reconfigured at will but occupies an essential place on silicon and justifies the high cost of FPGA components.
The Current Densities No Longer Allow Manual Routing
It is an automatic placement-routing tool that matches the logic diagram desired by the designer and the hardware resources of the chip. As time propagation dependent on the length of logic cells between links and the Agents routers optimization algorithms are not deterministic, performance (max frequency) obtained in a custom FPGA board vary from one design to the other. On the other hand, resource use is excellent, and occupancy rates of the logic block more significant than 90% are possible.
As the configuration (routing and LUTs) is done by volatile memory points, it is necessary to save the FPGA design in an external non-volatile memory, generally a serial Flash memory, compatible with JTAG. However, some manufacturers are distinguished by using EEPROM cells for configuration, eliminating the need for external memory, or by an anti-fuse arrangement (programming by a high voltage makes a dielectric “snap”, creating a contact). However, this latest technology cannot be reconfigured.
Benefits of using modern FPGA
Modern FPGAs are large enough and contain enough memory to be configured to house a processor core or DSP to run the software. In this case, we speak of a softcore processor instead of hard-core microprocessors buried in silicon. Today, FPGA manufacturers even integrate one or more “hard-core” processor cores on the same component to conserve the configurable logical resources of the element. This does not exclude the use of a softcore processor, which has many advantages.